A systolic array for pyramidal algorithms
نویسندگان
چکیده
منابع مشابه
Design and Implementation of a High Speed Systolic Serial Multiplier and Squarer for Long Unsigned Integer Using VHDL
A systolic serial multiplier for unsigned numbers is presented which operates without zero words inserted between successive data words, outputs the full product and has only one clock cycle latency. The multiplier is based on a modified serial/parallel scheme with two adjacent multiplier cells. Systolic concept is a well-known means of intensive computational task through replication of func...
متن کاملA Thinning Method of Linear And Planar Array Antennas To Reduce SLL of Radiation Pattern By GWO And ICA Algorithms
In the recent years, the optimization techniques using evolutionary algorithms have been widely used to solve electromagnetic problems. These algorithms use thinning the antenna arrays with the aim of reducing the complexity and thus achieving the optimal solution and decreasing the side lobe level. To obtain the optimal solution, thinning is performed by removing some elements in an array thro...
متن کاملDesign and Implementation of a High Speed Systolic Serial Multiplier and Squarer for Long Unsigned Integer Using VHDL
A systolic serial multiplier for unsigned numbers is presented which operates without zero words inserted between successive data words, outputs the full product and has only one clock cycle latency. 
The multiplier is based on a modified serial/parallel scheme with two adjacent multiplier cells. Systolic concept is a well-known means of intensive computational task through replication of fu...
متن کاملDynamically reconfigurable systolic array accelerators: A case study with extended Kalman filter and discrete wavelet transform algorithms
Dynamically Reconfigurable Systolic Array Accelerators: A Case Study with Extended Kalman Filter and Discrete Wavelet Transform Algorithms
متن کاملTagged systolic arrays - Computers and Digital Techniques [see also IEE Proceedings-Computers and Digital Techniques], IEE
Design of systolic arrays from a set of non-linear and nonuniform recurrence equations is discussed. A systematic method for deriving a systolic design in such cases is presented. A novel architectural idea, termed a tagged systolic array (TSA), is introduced. The design methodology described broadens the class of algorithms amenable for tagged systolic array implementation. The methodology is ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
- VLSI Signal Processing
دوره 4 شماره
صفحات -
تاریخ انتشار 1991